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Okay.
So, all here.

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So, let's get started.
So, we're continuing our ELE 475

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experience.
And we're going to continue on where we

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left off last time talking about vectors
and vector machines.

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And just to recap, cuz we went through
this really fast at the end of lecture

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last time.
When you have a vector computer, one of

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the things that you want to do or the easy
thing to do is to add vectors or numbers.

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But, what if you want to do work inside of
a vector? So, you want to take a vector

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and you want to sum all of the elements in
the vector.

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So, we call this a reduction, a vector
reduction. And if you're trying to do this

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with a vector machine, unless you have
some special instruction which looks at

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all the different elements, which is
probably a bad thing to do cuz if you're

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trying to do that then you would lose all
the advantages of having lane structures

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cuz you would build or partition the
elements.

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Cuz if you had to do a reduction you would
actually have to have, let's say, one ALU

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use all of the elements from these
different lanes.

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And that would be, that'd be sad.
So if you want to do a reduction, one of

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the ways to go about doing this is
actually have use vectors but use them

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sort of temporally.
And, you can use a, if you will a binary

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tree algorithm here to start off with a
big long vector that you want to do the

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sum of all the, the sub parts of this.
And the first step is you just cut this in

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half. And you take this half of the vector
and that half of the vector and you add

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it, and you end up with the partial sums
here, which is half the length. And again,

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add this half with that half and you can
use vector instructions to do that and for

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something half the length.
Continue, and at some point, you end up

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with a scallar, which is the sum.
So, this is pretty widely used to do

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vector reductions.
At the end of yesterday last class's

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lecture, we also briefly touched on more
interesting addressing modes.

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So, the vector addressing modes and
electro low, loads and stores we've been

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talking about.
Up to this point, you could bank very well

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and you could assign, let's say, different
regions of memory to, sort of, different

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lanes.
And you would always be able to do a load

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and actually just read out from your bank
that was sort of a, attached to a

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particular lane.
Well, that works well for very

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well-structured memory accesses. But all
of a sudden, let's say, you want to do an

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operation where you have C of D of i.
So, you have a vector, D, and you want to

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index into that vector.
So, it's a vector of addresses.

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And then, you want to take,
Or, or, a vector of indexes.

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And then, you want to take that index and
use that to index into C.

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So, this is something you commonly want to
do, but you need special support for it.

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And a basic vector architecture may not
have this.

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But you can add it.
And the, the MIPS architecture which is

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developed in the Hennessy and Patterson
book as this instruction here called load

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vector indirect.
Where you can actually have two vector

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registers, and the one will index into the
other, and then you have a destination

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vector register.
And, we call this gather.

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But your memory system, because you don't
know the a priori, if you will, the

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addressing, your memory system might get
big and complex.

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And you need to be able to have all, all
the lanes in your vector processor be able

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to talk to all the memory.
And that's probably a good thing to do

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anyway to make your machine a little more
flexible and to allow sort of vectors that

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don't have to align to a particular
address.

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But, you have to make your memory system
much more complicated to be able to do

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these sort of gather operations.
And the scatter operation is the, the

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inverse of this.
It would be SVI, a Store Vector Indirect

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which would do the store where you have an
indirect for the store.

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So, if this would be a, on the left hand
side of an assignment operation.

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Okay.
So now, we get to talk about a couple of

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examples.
Well, let's do, we'll touch on one

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example, actually, right now of a vector
machine.

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And this is what I was trying to say, when
I was coming in that, if you're going to

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build a really fast computer, and it could
cost millions of dollars, you're going to

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look cool.
So, the picture on the right here is the

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Cray-1.
And I've had the pleasure of seeing a

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couple of these and sitting on a couple of
these.

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And it has a nice little seat built into
it.

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You can actually sit down on it and it's
warm.

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Because this is a water cooled machine and
it uses a lot of this is water cooled.

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They later went to something called floor
inert to cool these machines.

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The Cray-1 was never floor inert cooled,
but the Cray-2 I think was,

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And the Cray-3 definitely was.
But, the, the idea is that you use water

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and you can have a nice place to sit so
the operator has a nice place to sit down

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while he's, you know, he or she is working
on the machine.

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And, it's heated because there's, these
machines are quite hot and that, and part

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of the, the power supplies are actually
under the bench here.

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The other fun thing about these is you'll
notice they're shaped like the letter C,

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for Cray.
No one really knows if that's true.

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I think you actually Seymour Cray claims
this to somehow make the, the distance of

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the back plane shorter. But it, it, it is
shaped like a C.

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And, and Seymour Cray, who's the, the, the
founder of Cray, does have a C as the

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first letter of his name.
But, for a little bit more from a influ,

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or a perspective of what's actually inside
of here, the Cray-1 did not actually have

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lots of different lanes.
Instead, what it was, it was a vector

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computer that had very long pipelines or
long for the time pipelines, it had a

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couple pipelines for different, different
functional units. And, it was a

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registered,
Register, vector register, register style

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machine.
And,

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Some of the, the, the interesting things
about this is it didn't have any caches.

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And, well, deleting virtual memory, any of
that other stuff because this is really

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sort of a super computer, you're using
this to solve some big problem.

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So, you didn't need all this fancy dancy
multi-tasking, virtualization.

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You ran one really big problem on it, you
were trying to, I don't know, somehow,

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model nuclear weapons, or use it to crack
codes, or something like that.

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Here's the, the, micro-architecture of the
Cray-1.

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And, what we see is they have 64 vectors
register, or excuse me, eight vector

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registers with 64 elements each.
Their vector length is 64,

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Their maximum vector length is 64.
And, they also have a bunch of scallar

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registers and they have a separate
addressing address register bank of

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registers.
And you can only do loads in store based

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on these address registers.
What I was trying to get at here, is you

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can see that they basically had only one
pipe for each of the different operations,

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but these pipes were relatively long. So,
they give you an idea here something like

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the multiply with six cycles, multiply to
six cycles which today sounds like, well,

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things are pipelined pretty deep.
We have lots of transistors.

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But, you know, it's 1976, there weren't
that many transistors.

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This thing was physically large. So,
building a pipeline that long took, took

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space.
Or, and another example here is I think

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the reciporical took about fourteen
cycles,

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And that was pipelined.
And this did not have interlocking between

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the different pipe stages.
And didn't have to have bypassing because

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the vector length was so long.
So, you didn't have to bypass from some

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place in the pipe to some place else in
the pipe.

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They did have chaining but, and, and they
did have inter-pipeline bypassing, but

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intra-pipeline bypassing wasn't, wasn't
really there.

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Couple other things, this machine ran
really pretty fast for the days.

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80 megahertz was I'm sure was the fastest
clock tick of, of the day.

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Today, that sounds pretty slow but that,
that was, that was pretty good for 1976.